clock_tree.h

// Copyright 2024 The Pigweed Authors
//
// Licensed under the Apache License, Version 2.0 (the "License"); you may not
// use this file except in compliance with the License. You may obtain a copy of
// the License at
//
//     https://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
// License for the specific language governing permissions and limitations under
// the License.
#pragma once
 
#include "fsl_clock.h"
#include "fsl_power.h"
#include "pw_clock_tree/clock_tree.h"
 
namespace pw::clock_tree {
 
 
class ClockMcuxpressoFro final
    : public ClockSource<ElementNonBlockingCannotFail> {
 public:
  constexpr ClockMcuxpressoFro(clock_fro_output_en_t fro_output)
      : fro_output_(fro_output) {}
 
 private:
  Status DoEnable() final {
    CLOCK_EnableFroClk(CLKCTL0->FRODIVOEN | fro_output_);
    return OkStatus();
  }
 
  Status DoDisable() final {
    CLOCK_EnableFroClk(CLKCTL0->FRODIVOEN & ~fro_output_);
    return OkStatus();
  }
 
  const uint32_t fro_output_;
};
 
class ClockMcuxpressoLpOsc final
    : public ClockSource<ElementNonBlockingCannotFail> {
 private:
  Status DoEnable() final {
    // Power up the 1MHz low power oscillator power domain.
    POWER_DisablePD(kPDRUNCFG_PD_LPOSC);
    // POWER_ApplyPD() is not necessary for LPOSC_PD.
 
    // Wait for the low power oscillator to stabilize.
    CLOCK_EnableLpOscClk();
    return OkStatus();
  }
 
  Status DoDisable() final {
    // Power down the 1MHz low power oscillator power domain.
    POWER_EnablePD(kPDRUNCFG_PD_LPOSC);
    // POWER_ApplyPD() is not necessary for LPOSC_PD.
    return OkStatus();
  }
};
 
template <typename ElementType>
class ClockMcuxpressoMclk final : public DependentElement<ElementType> {
 public:
  constexpr ClockMcuxpressoMclk(ElementType& source, uint32_t frequency)
      : DependentElement<ElementType>(source), frequency_(frequency) {}
 
 private:
  Status DoEnable() final {
    // Set global that stores external MCLK IN clock frequency.
    CLOCK_SetMclkFreq(frequency_);
    return OkStatus();
  }
 
  Status DoDisable() final {
    // Set global that stores external MCLK IN clock frequency to zero.
    CLOCK_SetMclkFreq(0);
    return OkStatus();
  }
 
  uint32_t frequency_;
};
 
using ClockMcuxpressoMclkBlocking = ClockMcuxpressoMclk<ElementBlocking>;
 
using ClockMcuxpressoMclkNonBlocking =
    ClockMcuxpressoMclk<ElementNonBlockingCannotFail>;
 
template <typename ElementType>
class ClockMcuxpressoClkIn final : public DependentElement<ElementType> {
 public:
  constexpr ClockMcuxpressoClkIn(ElementType& source, uint32_t frequency)
      : DependentElement<ElementType>(source), frequency_(frequency) {}
 
 private:
  Status DoEnable() final {
    // Set global that stores external CLK IN pin clock frequency.
    CLOCK_SetClkinFreq(frequency_);
 
    // OSC clock source selector ClkIn.
    const uint8_t kCLOCK_OscClkIn = CLKCTL0_SYSOSCBYPASS_SEL(1);
    CLKCTL0->SYSOSCBYPASS = kCLOCK_OscClkIn;
    return OkStatus();
  }
 
  Status DoDisable() final {
    // Set global that stores external CLK IN pin clock frequency to zero.
    CLOCK_SetClkinFreq(0);
 
    // Set OSC clock source selector None, which gates output to reduce power.
    const uint8_t kCLOCK_OscNone = CLKCTL0_SYSOSCBYPASS_SEL(7);
    CLKCTL0->SYSOSCBYPASS = kCLOCK_OscNone;
    return OkStatus();
  }
 
  uint32_t frequency_;
};
 
using ClockMcuxpressoClkInBlocking = ClockMcuxpressoClkIn<ElementBlocking>;
 
using ClockMcuxpressoClkInNonBlocking =
    ClockMcuxpressoClkIn<ElementNonBlockingCannotFail>;
 
template <typename ElementType>
class ClockMcuxpressoFrg final : public DependentElement<ElementType> {
 public:
  constexpr ClockMcuxpressoFrg(ElementType& source,
                               const clock_frg_clk_config_t& config)
      : DependentElement<ElementType>(source), config_(config) {}
 
 private:
  // FRG clock source selector None, which gates output to reduce power.
  // The None source selector is not defined in the SDK.
  const uint8_t kCLOCK_FrgNone = 7;
 
  Status DoEnable() final {
    CLOCK_SetFRGClock(&config_);
    return OkStatus();
  }
 
  Status DoDisable() final {
    clock_frg_clk_config_t disable_config = config_;
    disable_config.sfg_clock_src =
        static_cast<decltype(disable_config.sfg_clock_src)>(kCLOCK_FrgNone);
    CLOCK_SetFRGClock(&disable_config);
    return OkStatus();
  }
 
  const clock_frg_clk_config_t config_;
};
 
using ClockMcuxpressoFrgBlocking = ClockMcuxpressoFrg<ElementBlocking>;
 
using ClockMcuxpressoFrgNonBlocking =
    ClockMcuxpressoFrg<ElementNonBlockingCannotFail>;
 
template <typename ElementType>
class ClockMcuxpressoSelector : public DependentElement<ElementType> {
 public:
  constexpr ClockMcuxpressoSelector(ElementType& source,
                                    clock_attach_id_t selector_enable,
                                    clock_attach_id_t selector_disable)
      : DependentElement<ElementType>(source),
        selector_enable_(selector_enable),
        selector_disable_(selector_disable) {}
 
 private:
  Status DoEnable() final {
    CLOCK_AttachClk(selector_enable_);
    return OkStatus();
  }
 
  Status DoDisable() final {
    CLOCK_AttachClk(selector_disable_);
    return OkStatus();
  }
 
  clock_attach_id_t selector_enable_;
  clock_attach_id_t selector_disable_;
};
 
using ClockMcuxpressoSelectorBlocking =
    ClockMcuxpressoSelector<ElementBlocking>;
 
using ClockMcuxpressoSelectorNonBlocking =
    ClockMcuxpressoSelector<ElementNonBlockingCannotFail>;
 
template <typename ElementType>
class ClockMcuxpressoDivider final : public ClockDividerElement<ElementType> {
 public:
  constexpr ClockMcuxpressoDivider(ElementType& source,
                                   clock_div_name_t divider_name,
                                   uint32_t divider)
      : ClockDividerElement<ElementType>(source, divider),
        divider_name_(divider_name) {}
 
 private:
  Status DoEnable() final {
    CLOCK_SetClkDiv(divider_name_, this->divider());
    return OkStatus();
  }
 
  clock_div_name_t divider_name_;
};
 
using ClockMcuxpressoDividerBlocking = ClockMcuxpressoDivider<ElementBlocking>;
 
using ClockMcuxpressoDividerNonBlocking =
    ClockMcuxpressoDivider<ElementNonBlockingCannotFail>;
 
template <typename ElementType>
class ClockMcuxpressoAudioPll : public DependentElement<ElementType> {
 public:
  constexpr ClockMcuxpressoAudioPll(ElementType& source,
                                    const clock_audio_pll_config_t& config,
                                    uint8_t audio_pfd_divider)
      : DependentElement<ElementType>(source),
        config_(&config),
        audio_pfd_divider_(audio_pfd_divider) {}
 
  constexpr ClockMcuxpressoAudioPll(ElementType& source,
                                    audio_pll_src_t bypass_source)
      : DependentElement<ElementType>(source), bypass_source_(bypass_source) {}
 
 private:
  Status DoEnable() override {
    // If `config_` is specified, the PLL should be enabled and the phase
    // fractional divider PFD0 needs to get configured, otherwise the PLL
    // operates in bypass mode.
    if (config_ != nullptr) {
      // Configure Audio PLL clock source.
      CLOCK_InitAudioPll(config_);
      CLOCK_InitAudioPfd(kCLOCK_Pfd0, audio_pfd_divider_);
    } else {
      // PLL operates in bypass mode.
      CLKCTL1->AUDIOPLL0CLKSEL = bypass_source_;
      CLKCTL1->AUDIOPLL0CTL0 |= CLKCTL1_AUDIOPLL0CTL0_BYPASS_MASK;
    }
    return OkStatus();
  }
 
  Status DoDisable() override {
    if (config_ != nullptr) {
      // Clock gate the phase fractional divider PFD0.
      CLOCK_DeinitAudioPfd(kCLOCK_Pfd0);
    }
 
    // Power down Audio PLL
    CLOCK_DeinitAudioPll();
    return OkStatus();
  }
 
  const clock_audio_pll_config_t* config_ = nullptr;
 
  const uint8_t audio_pfd_divider_ = 0;
 
  const audio_pll_src_t bypass_source_ = kCLOCK_AudioPllNone;
};
 
template <typename ElementType>
class ClockMcuxpressoSysPll : public DependentElement<ElementType> {
 public:
  constexpr ClockMcuxpressoSysPll(ElementType& source,
                                  const clock_sys_pll_config_t& config,
                                  uint8_t sys_pfd0_divider,
                                  uint8_t sys_pfd1_divider,
                                  uint8_t sys_pfd2_divider,
                                  uint8_t sys_pfd3_divider)
      : DependentElement<ElementType>(source),
        config_(&config),
        sys_pfd0_divider_(sys_pfd0_divider),
        sys_pfd1_divider_(sys_pfd1_divider),
        sys_pfd2_divider_(sys_pfd2_divider),
        sys_pfd3_divider_(sys_pfd3_divider) {}
 
  constexpr ClockMcuxpressoSysPll(ElementType& source,
                                  sys_pll_src_t bypass_source)
      : DependentElement<ElementType>(source), bypass_source_(bypass_source) {}
 
 private:
  Status DoEnable() override {
    // If `config_` is specified, the PLL should be enabled and the phase
    // fractional divider PFD0 needs to get configured, otherwise the PLL
    // operates in bypass mode.
    if (config_ != nullptr) {
      // Configure Sys PLL clock source.
      CLOCK_InitSysPll(config_);
 
      if (sys_pfd0_divider_ != 0) {
        CLOCK_InitSysPfd(kCLOCK_Pfd0, sys_pfd0_divider_);
      }
      if (sys_pfd1_divider_ != 0) {
        CLOCK_InitSysPfd(kCLOCK_Pfd1, sys_pfd1_divider_);
      }
      if (sys_pfd2_divider_ != 0) {
        CLOCK_InitSysPfd(kCLOCK_Pfd2, sys_pfd2_divider_);
      }
      if (sys_pfd3_divider_ != 0) {
        CLOCK_InitSysPfd(kCLOCK_Pfd3, sys_pfd3_divider_);
      }
    } else {
      // PLL operates in bypass mode.
      CLKCTL0->SYSPLL0CLKSEL = bypass_source_;
      CLKCTL0->SYSPLL0CTL0 |= CLKCTL0_SYSPLL0CTL0_BYPASS_MASK;
    }
    return OkStatus();
  }
 
  Status DoDisable() override {
    if (config_ != nullptr) {
      // Clock gate all the phase fractional divider PFD.
      CLOCK_DeinitSysPfd(kCLOCK_Pfd0);
      CLOCK_DeinitSysPfd(kCLOCK_Pfd1);
      CLOCK_DeinitSysPfd(kCLOCK_Pfd2);
      CLOCK_DeinitSysPfd(kCLOCK_Pfd3);
    }
 
    // Power down Sys PLL
    CLOCK_DeinitSysPll();
    return OkStatus();
  }
 
  const clock_sys_pll_config_t* config_ = nullptr;
 
  const uint8_t sys_pfd0_divider_ = 0;
  const uint8_t sys_pfd1_divider_ = 0;
  const uint8_t sys_pfd2_divider_ = 0;
  const uint8_t sys_pfd3_divider_ = 0;
 
  const sys_pll_src_t bypass_source_ = kCLOCK_SysPllNone;
};
 
using ClockMcuxpressoAudioPllBlocking =
    ClockMcuxpressoAudioPll<ElementBlocking>;
 
using ClockMcuxpressoAudioPllNonBlocking =
    ClockMcuxpressoAudioPll<ElementNonBlockingCannotFail>;
 
using ClockMcuxpressoSysPllBlocking = ClockMcuxpressoSysPll<ElementBlocking>;
 
using ClockMcuxpressoSysPllNonBlocking =
    ClockMcuxpressoSysPll<ElementNonBlockingCannotFail>;
 
template <typename ElementType>
class ClockMcuxpressoRtc final : public DependentElement<ElementType> {
 public:
  constexpr ClockMcuxpressoRtc(ElementType& source)
      : DependentElement<ElementType>(source) {}
 
 private:
  Status DoEnable() final {
    // Enable 32kHZ output of RTC oscillator.
    CLOCK_EnableOsc32K(true);
    return OkStatus();
  }
 
  Status DoDisable() final {
    // Disable 32KHz output of RTC oscillator.
    CLOCK_EnableOsc32K(false);
    return OkStatus();
  }
};
 
using ClockMcuxpressoRtcBlocking = ClockMcuxpressoRtc<ElementBlocking>;
 
using ClockMcuxpressoRtcNonBlocking =
    ClockMcuxpressoRtc<ElementNonBlockingCannotFail>;
 
template <typename ElementType>
class ClockMcuxpressoClockIp final : public DependentElement<ElementType> {
 public:
  constexpr ClockMcuxpressoClockIp(ElementType& source, clock_ip_name_t clock)
      : DependentElement<ElementType>(source), clock_(clock) {}
 
 private:
  Status DoEnable() final {
    CLOCK_EnableClock(clock_);
    return OkStatus();
  }
 
  Status DoDisable() final {
    CLOCK_DisableClock(clock_);
    return OkStatus();
  }
 
  clock_ip_name_t clock_;
};
 
using ClockMcuxpressoClockIpBlocking = ClockMcuxpressoClockIp<ElementBlocking>;
 
using ClockMcuxpressoClockIpNonBlocking =
    ClockMcuxpressoClockIp<ElementNonBlockingCannotFail>;
}  // namespace pw::clock_tree