18#include "pw_clock_tree/clock_tree.h"
26 :
public ClockSource<ElementNonBlockingCannotFail> {
30 : fro_output_(fro_output) {}
35 CLOCK_EnableFroClk(CLKCTL0->FRODIVOEN | fro_output_);
41 CLOCK_EnableFroClk(CLKCTL0->FRODIVOEN & ~fro_output_);
46 const uint32_t fro_output_;
51 :
public ClockSource<ElementNonBlockingCannotFail> {
56 POWER_DisablePD(kPDRUNCFG_PD_LPOSC);
60 CLOCK_EnableLpOscClk();
67 POWER_EnablePD(kPDRUNCFG_PD_LPOSC);
77template <
typename ElementType>
82 template <
typename SourceType>
90 CLOCK_SetMclkFreq(frequency_);
120template <
typename ElementType>
125 template <
typename SourceType>
133 CLOCK_SetClkinFreq(frequency_);
136 const uint8_t kCLOCK_OscClkIn = CLKCTL0_SYSOSCBYPASS_SEL(1);
137 CLKCTL0->SYSOSCBYPASS = kCLOCK_OscClkIn;
144 CLOCK_SetClkinFreq(0);
147 const uint8_t kCLOCK_OscNone = CLKCTL0_SYSOSCBYPASS_SEL(7);
148 CLKCTL0->SYSOSCBYPASS = kCLOCK_OscNone;
170template <
typename ElementType>
174 template <
typename SourceType>
176 const clock_frg_clk_config_t& config)
182 const uint8_t kCLOCK_FrgNone = 7;
186 CLOCK_SetFRGClock(&config_);
192 clock_frg_clk_config_t disable_config = config_;
193 disable_config.sfg_clock_src =
194 static_cast<decltype(disable_config.sfg_clock_src)
>(kCLOCK_FrgNone);
195 CLOCK_SetFRGClock(&disable_config);
200 const clock_frg_clk_config_t config_;
214template <
typename ElementType>
220 template <
typename SourceType>
222 clock_attach_id_t selector_enable,
223 clock_attach_id_t selector_disable)
225 selector_enable_(selector_enable),
226 selector_disable_(selector_disable) {}
231 CLOCK_AttachClk(selector_enable_);
237 CLOCK_AttachClk(selector_disable_);
242 clock_attach_id_t selector_enable_;
244 clock_attach_id_t selector_disable_;
260template <
typename ElementType>
265 template <
typename SourceType>
267 clock_div_name_t divider_name,
270 divider_name_(divider_name) {}
275 CLOCK_SetClkDiv(divider_name_, this->
divider());
280 clock_div_name_t divider_name_;
302template <
typename ElementType>
306 template <
typename SourceType>
308 const clock_audio_pll_config_t& config,
309 uint8_t audio_pfd_divider)
312 audio_pfd_divider_(audio_pfd_divider) {}
315 template <
typename SourceType>
317 audio_pll_src_t bypass_source)
327 if (config_ !=
nullptr) {
329 CLOCK_InitAudioPll(config_);
330 CLOCK_InitAudioPfd(kCLOCK_Pfd0, audio_pfd_divider_);
333 CLKCTL1->AUDIOPLL0CLKSEL = bypass_source_;
334 CLKCTL1->AUDIOPLL0CTL0 |= CLKCTL1_AUDIOPLL0CTL0_BYPASS_MASK;
341 if (config_ !=
nullptr) {
343 CLOCK_DeinitAudioPfd(kCLOCK_Pfd0);
347 CLOCK_DeinitAudioPll();
352 const clock_audio_pll_config_t* config_ =
nullptr;
355 const uint8_t audio_pfd_divider_ = 0;
358 const audio_pll_src_t bypass_source_ = kCLOCK_AudioPllNone;
372template <
typename ElementType>
376 template <
typename SourceType>
378 const clock_sys_pll_config_t& config,
379 uint8_t sys_pfd0_divider,
380 uint8_t sys_pfd1_divider,
381 uint8_t sys_pfd2_divider,
382 uint8_t sys_pfd3_divider)
385 sys_pfd0_divider_(sys_pfd0_divider),
386 sys_pfd1_divider_(sys_pfd1_divider),
387 sys_pfd2_divider_(sys_pfd2_divider),
388 sys_pfd3_divider_(sys_pfd3_divider) {}
391 template <
typename SourceType>
393 sys_pll_src_t bypass_source)
403 if (config_ !=
nullptr) {
405 CLOCK_InitSysPll(config_);
407 if (sys_pfd0_divider_ != 0) {
408 CLOCK_InitSysPfd(kCLOCK_Pfd0, sys_pfd0_divider_);
410 if (sys_pfd1_divider_ != 0) {
411 CLOCK_InitSysPfd(kCLOCK_Pfd1, sys_pfd1_divider_);
413 if (sys_pfd2_divider_ != 0) {
414 CLOCK_InitSysPfd(kCLOCK_Pfd2, sys_pfd2_divider_);
416 if (sys_pfd3_divider_ != 0) {
417 CLOCK_InitSysPfd(kCLOCK_Pfd3, sys_pfd3_divider_);
421 CLKCTL0->SYSPLL0CLKSEL = bypass_source_;
422 CLKCTL0->SYSPLL0CTL0 |= CLKCTL0_SYSPLL0CTL0_BYPASS_MASK;
429 if (config_ !=
nullptr) {
431 CLOCK_DeinitSysPfd(kCLOCK_Pfd0);
432 CLOCK_DeinitSysPfd(kCLOCK_Pfd1);
433 CLOCK_DeinitSysPfd(kCLOCK_Pfd2);
434 CLOCK_DeinitSysPfd(kCLOCK_Pfd3);
438 CLOCK_DeinitSysPll();
443 const clock_sys_pll_config_t* config_ =
nullptr;
446 const uint8_t sys_pfd0_divider_ = 0;
447 const uint8_t sys_pfd1_divider_ = 0;
448 const uint8_t sys_pfd2_divider_ = 0;
449 const uint8_t sys_pfd3_divider_ = 0;
452 const sys_pll_src_t bypass_source_ = kCLOCK_SysPllNone;
476template <
typename ElementType>
481 template <
typename SourceType>
489 CLOCK_EnableOsc32K(
true);
496 CLOCK_EnableOsc32K(
false);
517template <
typename ElementType>
522 template <
typename SourceType>
529 CLOCK_EnableClock(clock_);
535 CLOCK_DisableClock(clock_);
539 clock_ip_name_t clock_;
Definition: clock_tree.h:471
Definition: clock_tree.h:303
Definition: clock_tree.h:121
Definition: clock_tree.h:518
Definition: clock_tree.h:261
Definition: clock_tree.h:171
Class implementing an FRO clock source.
Definition: clock_tree.h:26
Class implementing the low power oscillator clock source.
Definition: clock_tree.h:51
Definition: clock_tree.h:78
Definition: clock_tree.h:477
Definition: clock_tree.h:215
Definition: clock_tree.h:373
Definition: clock_tree.h:239
Definition: clock_tree.h:338
constexpr ClockMcuxpressoSysPll(SourceType &source, sys_pll_src_t bypass_source)
Constructor to place the Sys PLL into bypass mode.
Definition: clock_tree.h:392
constexpr ClockMcuxpressoAudioPll(SourceType &source, const clock_audio_pll_config_t &config, uint8_t audio_pfd_divider)
Constructor specifying the configuration for the enabled Audio PLL.
Definition: clock_tree.h:307
Status DoDisable() final
Disable low power oscillator.
Definition: clock_tree.h:65
Status DoDisable() final
Disable 32 kHz RTS oscillator.
Definition: clock_tree.h:494
Status DoEnable() final
Enable low power oscillator.
Definition: clock_tree.h:54
Status DoEnable() final
Enable selector.
Definition: clock_tree.h:230
constexpr ClockMcuxpressoClkIn(SourceType &source, uint32_t frequency)
Definition: clock_tree.h:126
constexpr ClockMcuxpressoSelector(SourceType &source, clock_attach_id_t selector_enable, clock_attach_id_t selector_disable)
Definition: clock_tree.h:221
constexpr ClockMcuxpressoRtc(SourceType &source)
Definition: clock_tree.h:482
Status DoEnable() final
Enable the clock.
Definition: clock_tree.h:528
Status DoDisable() final
Disable the clock.
Definition: clock_tree.h:534
Status DoEnable() final
Set the divider configuration.
Definition: clock_tree.h:274
constexpr ClockMcuxpressoMclk(SourceType &source, uint32_t frequency)
Definition: clock_tree.h:83
Status DoEnable() final
Set MCLK IN clock frequency.
Definition: clock_tree.h:88
constexpr ClockMcuxpressoSysPll(SourceType &source, const clock_sys_pll_config_t &config, uint8_t sys_pfd0_divider, uint8_t sys_pfd1_divider, uint8_t sys_pfd2_divider, uint8_t sys_pfd3_divider)
Constructor specifying the configuration for the enabled Sys PLL.
Definition: clock_tree.h:377
Status DoDisable() override
Disables the Sys PLL logic.
Definition: clock_tree.h:428
Status DoEnable() override
Definition: clock_tree.h:323
Status DoDisable() final
Disable selector.
Definition: clock_tree.h:236
constexpr ClockMcuxpressoDivider(SourceType &source, clock_div_name_t divider_name, uint32_t divider)
Definition: clock_tree.h:266
constexpr ClockMcuxpressoClockIp(SourceType &source, clock_ip_name_t clock)
Definition: clock_tree.h:523
constexpr ClockMcuxpressoFro(clock_fro_output_en_t fro_output)
Constructor specifying the FRO divider output to manage.
Definition: clock_tree.h:29
Status DoEnable() override
Definition: clock_tree.h:399
Status DoEnable() final
Enable 32 kHz RTC oscillator.
Definition: clock_tree.h:487
constexpr ClockMcuxpressoAudioPll(SourceType &source, audio_pll_src_t bypass_source)
Constructor to place the Audio PLL into bypass mode.
Definition: clock_tree.h:316
Status DoEnable() final
Set CLK IN clock frequency.
Definition: clock_tree.h:131
Status DoDisable() final
Disable this FRO divider.
Definition: clock_tree.h:40
Status DoDisable() final
Disable FRG configuration.
Definition: clock_tree.h:191
Status DoDisable() override
Disables the audio PLL logic.
Definition: clock_tree.h:340
Status DoEnable() final
Enable FRG configuration.
Definition: clock_tree.h:185
Status DoDisable() final
Set MCLK IN clock frequency to 0 Hz.
Definition: clock_tree.h:95
Status DoDisable() final
Set CLK IN clock frequency to 0 Hz.
Definition: clock_tree.h:142
constexpr ClockMcuxpressoFrg(SourceType &source, const clock_frg_clk_config_t &config)
Constructor specifying the source clock and FRG configuration.
Definition: clock_tree.h:175
Status DoEnable() final
Enable this FRO divider.
Definition: clock_tree.h:34
uint32_t divider() const
Get current divider value.
Definition: clock_tree.h:504
constexpr Status OkStatus()
Definition: status.h:450
Clock tree management library.
Definition: clock_tree.h:30