18#include "pw_clock_tree/clock_tree.h"
25class [[deprecated(
"Use ClockMcuxpressoFroSource instead")]]
30 : fro_output_(fro_output) {}
35 CLOCK_EnableFroClk(CLKCTL0->FRODIVOEN | fro_output_);
41 CLOCK_EnableFroClk(CLKCTL0->FRODIVOEN & ~fro_output_);
46 const uint32_t fro_output_;
51 :
public ClockSource<ElementNonBlockingCannotFail> {
57 POWER_DisablePD(kPDRUNCFG_PD_FFRO);
62 POWER_EnablePD(kPDRUNCFG_PD_FFRO);
72 clock_fro_output_en_t fro_output)
74 fro_output_(fro_output) {}
78 CLOCK_EnableFroClk(CLKCTL0->FRODIVOEN | fro_output_);
83 CLOCK_EnableFroClk(CLKCTL0->FRODIVOEN & ~fro_output_);
87 const uint32_t fro_output_;
92 :
public ClockSource<ElementNonBlockingCannotFail> {
97 POWER_DisablePD(kPDRUNCFG_PD_LPOSC);
101 CLOCK_EnableLpOscClk();
108 POWER_EnablePD(kPDRUNCFG_PD_LPOSC);
118template <
typename ElementType>
123 template <
typename SourceType>
131 CLOCK_SetMclkFreq(frequency_);
138 CLOCK_SetMclkFreq(0);
161template <
typename ElementType>
166 template <
typename SourceType>
174 CLOCK_SetClkinFreq(frequency_);
177 const uint8_t kCLOCK_OscClkIn = CLKCTL0_SYSOSCBYPASS_SEL(1);
178 CLKCTL0->SYSOSCBYPASS = kCLOCK_OscClkIn;
185 CLOCK_SetClkinFreq(0);
188 const uint8_t kCLOCK_OscNone = CLKCTL0_SYSOSCBYPASS_SEL(7);
189 CLKCTL0->SYSOSCBYPASS = kCLOCK_OscNone;
211template <
typename ElementType>
215 template <
typename SourceType>
217 const clock_frg_clk_config_t& config)
223 const uint8_t kCLOCK_FrgNone = 7;
227 CLOCK_SetFRGClock(&config_);
233 clock_frg_clk_config_t disable_config = config_;
234 disable_config.sfg_clock_src =
235 static_cast<decltype(disable_config.sfg_clock_src)
>(kCLOCK_FrgNone);
236 CLOCK_SetFRGClock(&disable_config);
241 const clock_frg_clk_config_t config_;
255template <
typename ElementType>
261 template <
typename SourceType>
263 clock_attach_id_t selector_enable,
264 clock_attach_id_t selector_disable)
266 selector_enable_(selector_enable),
267 selector_disable_(selector_disable) {}
272 CLOCK_AttachClk(selector_enable_);
278 CLOCK_AttachClk(selector_disable_);
283 clock_attach_id_t selector_enable_;
285 clock_attach_id_t selector_disable_;
301template <
typename ElementType>
306 template <
typename SourceType>
308 clock_div_name_t divider_name,
311 divider_name_(divider_name) {}
316 CLOCK_SetClkDiv(divider_name_, this->
divider());
321 clock_div_name_t divider_name_;
343template <
typename ElementType>
347 template <
typename SourceType>
349 const clock_audio_pll_config_t& config,
350 uint8_t audio_pfd_divider)
353 audio_pfd_divider_(audio_pfd_divider) {}
356 template <
typename SourceType>
358 audio_pll_src_t bypass_source)
368 if (config_ !=
nullptr) {
370 CLOCK_InitAudioPll(config_);
371 CLOCK_InitAudioPfd(kCLOCK_Pfd0, audio_pfd_divider_);
374 CLKCTL1->AUDIOPLL0CLKSEL = bypass_source_;
375 CLKCTL1->AUDIOPLL0CTL0 |= CLKCTL1_AUDIOPLL0CTL0_BYPASS_MASK;
382 if (config_ !=
nullptr) {
384 CLOCK_DeinitAudioPfd(kCLOCK_Pfd0);
388 CLOCK_DeinitAudioPll();
393 const clock_audio_pll_config_t* config_ =
nullptr;
396 const uint8_t audio_pfd_divider_ = 0;
399 const audio_pll_src_t bypass_source_ = kCLOCK_AudioPllNone;
413template <
typename ElementType>
417 template <
typename SourceType>
419 const clock_sys_pll_config_t& config,
420 uint8_t sys_pfd0_divider,
421 uint8_t sys_pfd1_divider,
422 uint8_t sys_pfd2_divider,
423 uint8_t sys_pfd3_divider)
426 sys_pfd0_divider_(sys_pfd0_divider),
427 sys_pfd1_divider_(sys_pfd1_divider),
428 sys_pfd2_divider_(sys_pfd2_divider),
429 sys_pfd3_divider_(sys_pfd3_divider) {}
432 template <
typename SourceType>
434 sys_pll_src_t bypass_source)
444 if (config_ !=
nullptr) {
446 CLOCK_InitSysPll(config_);
448 if (sys_pfd0_divider_ != 0) {
449 CLOCK_InitSysPfd(kCLOCK_Pfd0, sys_pfd0_divider_);
451 if (sys_pfd1_divider_ != 0) {
452 CLOCK_InitSysPfd(kCLOCK_Pfd1, sys_pfd1_divider_);
454 if (sys_pfd2_divider_ != 0) {
455 CLOCK_InitSysPfd(kCLOCK_Pfd2, sys_pfd2_divider_);
457 if (sys_pfd3_divider_ != 0) {
458 CLOCK_InitSysPfd(kCLOCK_Pfd3, sys_pfd3_divider_);
462 CLKCTL0->SYSPLL0CLKSEL = bypass_source_;
463 CLKCTL0->SYSPLL0CTL0 |= CLKCTL0_SYSPLL0CTL0_BYPASS_MASK;
470 if (config_ !=
nullptr) {
472 CLOCK_DeinitSysPfd(kCLOCK_Pfd0);
473 CLOCK_DeinitSysPfd(kCLOCK_Pfd1);
474 CLOCK_DeinitSysPfd(kCLOCK_Pfd2);
475 CLOCK_DeinitSysPfd(kCLOCK_Pfd3);
479 CLOCK_DeinitSysPll();
484 const clock_sys_pll_config_t* config_ =
nullptr;
487 const uint8_t sys_pfd0_divider_ = 0;
488 const uint8_t sys_pfd1_divider_ = 0;
489 const uint8_t sys_pfd2_divider_ = 0;
490 const uint8_t sys_pfd3_divider_ = 0;
493 const sys_pll_src_t bypass_source_ = kCLOCK_SysPllNone;
517template <
typename ElementType>
522 template <
typename SourceType>
530 CLOCK_EnableOsc32K(
true);
537 CLOCK_EnableOsc32K(
false);
558template <
typename ElementType>
563 template <
typename SourceType>
570 CLOCK_EnableClock(clock_);
576 CLOCK_DisableClock(clock_);
580 clock_ip_name_t clock_;
Definition: clock_tree.h:471
Definition: clock_tree.h:344
Definition: clock_tree.h:162
Definition: clock_tree.h:559
Definition: clock_tree.h:302
Definition: clock_tree.h:212
FRO divider elements.
Definition: clock_tree.h:69
Class implementing an FRO clock source.
Definition: clock_tree.h:26
Class implementing the FRO clock source.
Definition: clock_tree.h:51
Class implementing the low power oscillator clock source.
Definition: clock_tree.h:92
Definition: clock_tree.h:119
Definition: clock_tree.h:518
Definition: clock_tree.h:256
Definition: clock_tree.h:414
Definition: clock_tree.h:239
Definition: clock_tree.h:338
constexpr ClockMcuxpressoSysPll(SourceType &source, sys_pll_src_t bypass_source)
Constructor to place the Sys PLL into bypass mode.
Definition: clock_tree.h:433
constexpr ClockMcuxpressoAudioPll(SourceType &source, const clock_audio_pll_config_t &config, uint8_t audio_pfd_divider)
Constructor specifying the configuration for the enabled Audio PLL.
Definition: clock_tree.h:348
Status DoDisable() final
Disable low power oscillator.
Definition: clock_tree.h:106
Status DoDisable() final
Disable 32 kHz RTS oscillator.
Definition: clock_tree.h:535
Status DoEnable() final
Enable low power oscillator.
Definition: clock_tree.h:95
Status DoEnable() final
Enable selector.
Definition: clock_tree.h:271
constexpr ClockMcuxpressoClkIn(SourceType &source, uint32_t frequency)
Definition: clock_tree.h:167
Status DoDisable() final
Definition: clock_tree.h:61
constexpr ClockMcuxpressoSelector(SourceType &source, clock_attach_id_t selector_enable, clock_attach_id_t selector_disable)
Definition: clock_tree.h:262
constexpr ClockMcuxpressoRtc(SourceType &source)
Definition: clock_tree.h:523
Status DoEnable() final
Enable the clock.
Definition: clock_tree.h:569
Status DoDisable() final
Disable the clock.
Definition: clock_tree.h:575
Status DoEnable() final
Set the divider configuration.
Definition: clock_tree.h:315
constexpr ClockMcuxpressoMclk(SourceType &source, uint32_t frequency)
Definition: clock_tree.h:124
Status DoEnable() final
Set MCLK IN clock frequency.
Definition: clock_tree.h:129
constexpr ClockMcuxpressoSysPll(SourceType &source, const clock_sys_pll_config_t &config, uint8_t sys_pfd0_divider, uint8_t sys_pfd1_divider, uint8_t sys_pfd2_divider, uint8_t sys_pfd3_divider)
Constructor specifying the configuration for the enabled Sys PLL.
Definition: clock_tree.h:418
Status DoDisable() override
Disables the Sys PLL logic.
Definition: clock_tree.h:469
Status DoEnable() override
Definition: clock_tree.h:364
Status DoDisable() final
Disable selector.
Definition: clock_tree.h:277
constexpr ClockMcuxpressoDivider(SourceType &source, clock_div_name_t divider_name, uint32_t divider)
Definition: clock_tree.h:307
constexpr ClockMcuxpressoClockIp(SourceType &source, clock_ip_name_t clock)
Definition: clock_tree.h:564
constexpr ClockMcuxpressoFro(clock_fro_output_en_t fro_output)
Constructor specifying the FRO divider output to manage.
Definition: clock_tree.h:29
Status DoEnable() final
Function called when the clock tree element needs to get enabled.
Definition: clock_tree.h:77
Status DoEnable() final
Function called when the clock tree element needs to get enabled.
Definition: clock_tree.h:56
Status DoEnable() override
Definition: clock_tree.h:440
Status DoEnable() final
Enable 32 kHz RTC oscillator.
Definition: clock_tree.h:528
constexpr ClockMcuxpressoAudioPll(SourceType &source, audio_pll_src_t bypass_source)
Constructor to place the Audio PLL into bypass mode.
Definition: clock_tree.h:357
Status DoEnable() final
Set CLK IN clock frequency.
Definition: clock_tree.h:172
Status DoDisable() final
Disable this FRO divider.
Definition: clock_tree.h:40
Status DoDisable() final
Disable FRG configuration.
Definition: clock_tree.h:232
Status DoDisable() override
Disables the audio PLL logic.
Definition: clock_tree.h:381
Status DoEnable() final
Enable FRG configuration.
Definition: clock_tree.h:226
Status DoDisable() final
Set MCLK IN clock frequency to 0 Hz.
Definition: clock_tree.h:136
Status DoDisable() final
Set CLK IN clock frequency to 0 Hz.
Definition: clock_tree.h:183
Status DoDisable() final
Definition: clock_tree.h:82
constexpr ClockMcuxpressoFrg(SourceType &source, const clock_frg_clk_config_t &config)
Constructor specifying the source clock and FRG configuration.
Definition: clock_tree.h:216
Status DoEnable() final
Enable this FRO divider.
Definition: clock_tree.h:34
uint32_t divider() const
Get current divider value.
Definition: clock_tree.h:504
constexpr Status OkStatus()
Definition: status.h:450
Clock tree management library.
Definition: clock_tree.h:30