Overview

template<typename ElementType>
class pw::clock_tree::ClockMcuxpressoSysPll< ElementType >

Class template implementing the sys pll clock element.

The Sys PLL can either operate in the enabled mode where the PLL and the phase fractional divider are enabled, or it can operate in bypass mode, where both PLL and phase fractional divider are clock gated. When the Sys PLL clock tree gets disabled, both PLL and phase fractional divider will be clock gated.

Template argument ElementType can be of class ElementBlocking or ElementNonBlockingCannotFail.

Inheritance diagram for pw::clock_tree::ClockMcuxpressoSysPll< ElementType >:

Public Member Functions
constexpr	ClockMcuxpressoSysPll (ElementType &source, const clock_sys_pll_config_t &config, uint8_t sys_pfd0_divider, uint8_t sys_pfd1_divider, uint8_t sys_pfd2_divider, uint8_t sys_pfd3_divider)
	Constructor specifying the configuration for the enabled Sys PLL.

constexpr	ClockMcuxpressoSysPll (ElementType &source, sys_pll_src_t bypass_source)
	Constructor to place the Sys PLL into bypass mode.

Public Member Functions inherited from pw::clock_tree::DependentElement< ElementType >
constexpr	DependentElement (ElementType &source)
	Create a dependent clock tree element that depends on `source`.

Private Member Functions
Status	DoEnable () override

Status	DoDisable () override
	Disables the Sys PLL logic.

The documentation for this class was generated from the following file:

pw_clock_tree_mcuxpresso/public/pw_clock_tree_mcuxpresso/clock_tree.h

Overview

Public Member Functions

Private Member Functions